標(biāo)準(zhǔn)號：IEC 60191-6-6-2001
中文標(biāo)準(zhǔn)名稱：半導(dǎo)體器件的機(jī)械標(biāo)準(zhǔn)化 第6-6部分：表面安裝半導(dǎo)體器件封裝外形圖繪制的一般規(guī)則 小爆距紋間表面網(wǎng)格陣列（FLAG）的設(shè)計(jì)指南
英文標(biāo)準(zhǔn)名稱：Mechanical standardization of semiconductor devices - Part 6-6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages; Design guide for fine pitch land grid array (FLGA)
標(biāo)準(zhǔn)類型：L40
發(fā)布日期：1999/12/31 12:00:00
實(shí)施日期：1999/12/31 12:00:00
中國標(biāo)準(zhǔn)分類號：L40
國際標(biāo)準(zhǔn)分類號：01.100.25;31.240
適用范圍：This part of IEC 60191 provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch land grid array (hereinafter called FLGA) whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square.